Embedded SOPC design with NIOS II processor and VHDL examples /
"The book is divided into four major parts. Part I covers HDL constructs and synthesis of basic digital circuits. Part II provides an overview of embedded software development with the emphasis on low-level I/O access and drivers. Part III demonstrates the design and development of hardware and...
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| Autor Principal: | |
|---|---|
| Formato: | Libro |
| Idioma: | English |
| Publicado: |
Hoboken, N.J. :
Wiley,
c2011.
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| LEADER | 02610cam a22003134a 4500 | ||
|---|---|---|---|
| 001 | EUN.eunm004114 | ||
| 005 | 20130304140104.0 | ||
| 008 | 110527s2011####njua#####b####001#0#eng## | ||
| 010 | |a 2011022710 | ||
| 020 | |a 111800888X | ||
| 020 | |a 9781118008881 (ISBN-13) | ||
| 040 | |a DLC |c DLC |d YDX |d BTCTA |d YDXCP |d BWX |d CDX |d DLC | ||
| 050 | 0 | 0 | |a TK7895.E42 |b C48 2011 |
| 082 | 0 | 4 | |a 621.381952 |2 19 |
| 082 | 0 | 0 | |a 621.39/2 |2 23 |
| 084 | |a TEC008010 |2 bisacsh | ||
| 100 | 1 | |a Chu, Pong P., |d 1959- |9 1580270 | |
| 245 | 1 | 0 | |a Embedded SOPC design with NIOS II processor and VHDL examples / |c Pong P. Chu. |
| 260 | |a Hoboken, N.J. : |b Wiley, |c c2011. | ||
| 300 | |a xxxi, 703 p. : |b il. ; |c 26 cm. | ||
| 504 | |a Incluye referencias bibliográficas e índice. | ||
| 520 | |a "The book is divided into four major parts. Part I covers HDL constructs and synthesis of basic digital circuits. Part II provides an overview of embedded software development with the emphasis on low-level I/O access and drivers. Part III demonstrates the design and development of hardware and software for several complex I/O peripherals, including PS2 keyboard and mouse, a graphic video controller, an audio codec, and an SD (secure digital) card. Part IV provides three case studies of the integration of hardware accelerators, including a custom GCD (greatest common divisor) circuit, a Mandelbrot set fractal circuit, and an audio synthesizer based on DDFS (direct digital frequency synthesis) methodology.The book utilizes FPGA devices, Nios II soft-core processor, and development platform from Altera Co., which is one of the two main FPGA manufactures. Altera has a generous university program that provides free software and discounted prototyping boards for educational institutions (details at http://www.altera.com/university). The two main educational prototyping boards are known as DE1 ($99) and DE2 ($269). All experiments can be implemented and tested with these boards. A board combined with this book becomes a "turn-key" solution for the SoPC design experiments and projects. Most HDL and C codes in the book are device independent and can be adapted by other prototyping boards as long as a board has similar I/O configuration"-- |c Provisto por el editor. | ||
| 650 | 7 | |a Ingeniería. |2 unbist |9 1492775 | |
| 650 | 7 | |a Computadoras. |2 unbist |9 004410 | |
| 650 | 7 | |a Dispositivos de entrada salida. |2 unbist |9 1580278 | |
| 650 | 0 | |a VHDL (Lenguaje de descripción del hardware) |9 1580279 | |
| 653 | |a Systems on a chip. |9 1580280 | ||
| 653 | |a Dispositivos FPGAs. |9 1580181 | ||
| 859 | |a AR-BaUNS |b BIB. CENTRAL - Sector A |h 621.381952 |i C47 |p 122926/012 | ||