Saxena, P., Shelar, R. S., & Sapatnekar, S. S. (2007). Routing Congestion in VLSI Circuits: Estimation and Optimization. Springer Science+Business Media, LLC.
Citación estilo ChicagoSaxena, Prashant., Rupesh S. Shelar, and Sachin S. Sapatnekar. Routing Congestion in VLSI Circuits: Estimation and Optimization. Boston, MA: Springer Science+Business Media, LLC, 2007.
Cita MLASaxena, Prashant., Rupesh S. Shelar, and Sachin S. Sapatnekar. Routing Congestion in VLSI Circuits: Estimation and Optimization. Boston, MA: Springer Science+Business Media, LLC, 2007.
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